| Pin | Name | Description |
|---|---|---|
| 1 | GND | Ground |
| 2 | +5V | +5 VDC |
| 3 | +5V | +5 VDC |
| 4 | /IRQ | Interrupt |
| 5 | R/W | Read/Write (1=Read, 0=Write) |
| 6 | C1HIGH | External Cartridge Chip Selects C1 High |
| 7 | C2LOW | External Cartridge Chip Selects C2 Low (reserved) |
| 8 | C2HIGH | External Cartridge Chip Selects C2 High (reserved) |
| 9 | /CS1 | Chip Select Line 1 |
| 10 | /CS0 | Chip Select Line 0 |
| 11 | /CAS | Column Address Strobe |
| 12 | MUX | DRAM address multiplex control signal |
| 13 | BA | Bus Available (Low=DMA) |
| 14 | D7 | Data 7 |
| 15 | D6 | Data 6 |
| 16 | D5 | Data 5 |
| 17 | D4 | Data 4 |
| 18 | D3 | Data 3 |
| 19 | D2 | Data 2 |
| 20 | D1 | Data 1 |
| 21 | D0 | Data 0 |
| 22 | AEC | Address Enable Code |
| 23 | EAI | External Audio In |
| 24 | PHI 2 | Artificial Phi 2 signal |
| 25 | GND | Ground |
| A | GND | Ground |
| B | C1LOW | External Cartridge Chip Selects C1 Low |
| C | /RESET | Reset |
| D | /RAS | Row Address Strobe |
| E | PHI 0 | Artificial Phi 0 Signal |
| F | A15 | Address 15 |
| H | A14 | Address 14 |
| J | A13 | Address 13 |
| K | A12 | Address 12 |
| L | A11 | Address 11 |
| M | A10 | Address 10 |
| N | A9 | Address 9 |
| P | A8 | Address 8 |
| R | A7 | Address 7 |
| S | A6 | Address 6 |
| T | A5 | Address 5 |
| U | A4 | Address 4 |
| V | A3 | Address 3 |
| W | A2 | Address 2 |
| X | A1 | Address 1 |
| Y | A0 | Address 0 |
| Z | n/c | Not connected |
| AA | n/c | Not connected |
| BB | n/c | Not connected |
| CC | GND | Ground |
PHI 2: Address valid on the rising edge, data valid on the falling edge
правильная
с ошибками