1 TOP 22 +-------------------//----------------+ | =================//================ | +-----------------//------------------+ A BOTTOM Z
Pin | Name | Description |
---|---|---|
A | GND | Ground |
B | CA0 | Address 0 |
C | CA1 | Address 1 |
D | CA2 | Address 2 |
E | CA3 | Address 3 |
F | CA4 | Address 4 |
H | CA5 | Address 5 |
J | CA6 | Address 6 |
K | CA7 | Address 7 |
L | CA8 | Address 8 |
M | CA9 | Address 9 |
N | CA10 | Address 10 |
P | CA11 | Address 11 |
R | CA12 | Address 12 |
S | CA13 | Address 13 |
T | I/O 2 | Decoded I/O block 2, starting at $9800 |
U | I/O 3 | Decoded I/O block 3, starting at $9C00 |
V | S02 | Phase 2 System Clock |
W | /NMI | Non maskable Interrupt |
X | /RESET | 6502 Reset |
Y | n/c | Not connected |
Z | GND | Ground |
1 | GND | Ground |
2 | CD0 | Data 0 |
3 | CD1 | Data 1 |
4 | CD2 | Data 2 |
5 | CD3 | Data 3 |
6 | CD4 | Data 4 |
7 | CD5 | Data 5 |
8 | CD6 | Data 6 |
9 | CD7 | Data 7 |
10 | /BLK 1 | BLK 1 (Memory location $2000 - $3fff) |
11 | /BLK 2 | BLK 2 (Memory location $4000 - $5fff) |
12 | /BLK 3 | BLK 3 (Memory location $6000 - $7fff) |
13 | /BLK 5 | BLK 5 (Memory location $a000 - $bfff) |
14 | RAM 1 | RAM 1 (Memory location $0400 - $07ff) |
15 | RAM 2 | RAM 2 (Memory location $0800 - $0bff) |
16 | RAM 3 | RAM 3 (Memory location $0c00 - $0fff) |
17 | V R/W | Read/Write from Vic chip (1=R, 0=W) |
18 | C R/W | Read/Write from CPU (1=R, 0=W) |
19 | /IRQ | 6502 Interrupt Request |
20 | n/c | Not connected |
21 | +5V | +5 VDC |
22 | GND | Ground |