50 PIN UNKNOWN CONNECTOR
Unbuffered data bus, bits 0 through 15
Unbuffered 68HC000 address bus, bits 1 through 23
16 MHz system clock
External data transfer acknowledge that disables main system /DTACK.
68HC000 Address strobe
Data transfer acknowledge, /DTACK input to 68HC000.
This signal is generated by the addressing PAL and is used to put the ROM board into the idle mode by inserting multiple wait states.
Permanent ROM chip select signal. Selects in range $90 0000 through $9F FFFF.